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author | Konstantin Pavlov <thresh@nginx.com> | 2022-06-02 16:51:49 +0400 |
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committer | Konstantin Pavlov <thresh@nginx.com> | 2022-06-02 16:51:49 +0400 |
commit | d9fddee1dbfc1f5d49c8f40386289d7188030952 (patch) | |
tree | 842a62b343ac33eba10e7a426a10b55bb1c46aed /src/nxt_atomic.h | |
parent | 420395ee2e7cd464e157c49bea3d74f15bf25f30 (diff) | |
parent | 0d48fe73c4450901622373e35f6ff3a944ec13d6 (diff) | |
download | unit-d9fddee1dbfc1f5d49c8f40386289d7188030952.tar.gz unit-d9fddee1dbfc1f5d49c8f40386289d7188030952.tar.bz2 |
Merged with the default branch.1.27.0-1
Diffstat (limited to 'src/nxt_atomic.h')
-rw-r--r-- | src/nxt_atomic.h | 60 |
1 files changed, 20 insertions, 40 deletions
diff --git a/src/nxt_atomic.h b/src/nxt_atomic.h index 9e2e5ec1..cd2e7253 100644 --- a/src/nxt_atomic.h +++ b/src/nxt_atomic.h @@ -26,28 +26,23 @@ typedef volatile nxt_atomic_uint_t nxt_atomic_t; * __sync_lock_release() is a release barrier. */ -#define \ -nxt_atomic_cmp_set(lock, cmp, set) \ +#define nxt_atomic_cmp_set(lock, cmp, set) \ __sync_bool_compare_and_swap(lock, cmp, set) -#define \ -nxt_atomic_xchg(lock, set) \ +#define nxt_atomic_xchg(lock, set) \ __sync_lock_test_and_set(lock, set) -#define \ -nxt_atomic_fetch_add(value, add) \ +#define nxt_atomic_fetch_add(value, add) \ __sync_fetch_and_add(value, add) -#define \ -nxt_atomic_try_lock(lock) \ +#define nxt_atomic_try_lock(lock) \ nxt_atomic_cmp_set(lock, 0, 1) -#define \ -nxt_atomic_release(lock) \ +#define nxt_atomic_release(lock) \ __sync_lock_release(lock) @@ -60,13 +55,11 @@ nxt_atomic_release(lock) \ #if (__i386__ || __i386 || __amd64__ || __amd64) -#define \ -nxt_cpu_pause() \ +#define nxt_cpu_pause() \ __asm__ ("pause") #else -#define \ -nxt_cpu_pause() +#define nxt_cpu_pause() #endif @@ -79,18 +72,15 @@ typedef ulong_t nxt_atomic_uint_t; typedef volatile nxt_atomic_uint_t nxt_atomic_t; -#define \ -nxt_atomic_cmp_set(lock, cmp, set) \ +#define nxt_atomic_cmp_set(lock, cmp, set) \ (atomic_cas_ulong(lock, cmp, set) == (ulong_t) cmp) -#define \ -nxt_atomic_xchg(lock, set) \ +#define nxt_atomic_xchg(lock, set) \ atomic_add_swap(lock, set) -#define \ -nxt_atomic_fetch_add(value, add) \ +#define nxt_atomic_fetch_add(value, add) \ (atomic_add_long_nv(value, add) - add) @@ -124,13 +114,11 @@ nxt_atomic_fetch_add(value, add) \ * barrier. */ -#define \ -nxt_atomic_try_lock(lock) \ +#define nxt_atomic_try_lock(lock) \ nxt_atomic_cmp_set(lock, 0, 1) -#define \ -nxt_atomic_release(lock) \ +#define nxt_atomic_release(lock) \ *lock = 0; @@ -142,13 +130,11 @@ nxt_atomic_release(lock) \ */ #if (__i386__ || __i386 || __amd64__ || __amd64) -#define \ -nxt_cpu_pause() \ +#define nxt_cpu_pause() \ __asm__ ("rep; nop") #else -#define \ -nxt_cpu_pause() +#define nxt_cpu_pause() #endif @@ -192,13 +178,11 @@ nxt_atomic_cmp_set(nxt_atomic_t *lock, nxt_atomic_int_t cmp, } -#define \ -nxt_atomic_xchg(lock, set) \ +#define nxt_atomic_xchg(lock, set) \ __fetch_and_swaplp(lock, set) -#define \ -nxt_atomic_fetch_add(value, add) \ +#define nxt_atomic_fetch_add(value, add) \ __fetch_and_addlp(value, add) @@ -221,13 +205,11 @@ nxt_atomic_cmp_set(nxt_atomic_t *lock, nxt_atomic_int_t cmp, } -#define \ -nxt_atomic_xchg(lock, set) \ +#define nxt_atomic_xchg(lock, set) \ __fetch_and_swap(lock, set) -#define \ -nxt_atomic_fetch_add(value, add) \ +#define nxt_atomic_fetch_add(value, add) \ __fetch_and_add(value, add) @@ -270,13 +252,11 @@ nxt_atomic_try_lock(nxt_atomic_t *lock) } -#define \ -nxt_atomic_release(lock) \ +#define nxt_atomic_release(lock) \ do { __lwsync(); *lock = 0; } while (0) -#define \ -nxt_cpu_pause() +#define nxt_cpu_pause() #endif /* NXT_HAVE_XLC_ATOMIC */ |