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| author | David CARLIER <devnexen@gmail.com> | 2020-12-31 20:49:19 +0000 |
|---|---|---|
| committer | Andrew Clayton <a.clayton@nginx.com> | 2023-11-10 02:59:49 +0000 |
| commit | dfdf948f899bda9120750d28c1be32f255ed941f (patch) | |
| tree | 374389ff8937421f346d7cc4bd7b6843acbfce6d /src | |
| parent | 5cfad9cc0bb3809f802cf83d2739739fdfaab7a8 (diff) | |
| download | unit-dfdf948f899bda9120750d28c1be32f255ed941f.tar.gz unit-dfdf948f899bda9120750d28c1be32f255ed941f.tar.bz2 | |
Define nxt_cpu_pause for ARM64.
The isb instruction fits for spin loops where it allows to save cpu
power.
Reviewed-by: Andrew Clayton <a.clayton@nginx.com>
Signed-off-by: Andrew Clayton <a.clayton@nginx.com>
Diffstat (limited to 'src')
| -rw-r--r-- | src/nxt_atomic.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/src/nxt_atomic.h b/src/nxt_atomic.h index cd2e7253..dae999a9 100644 --- a/src/nxt_atomic.h +++ b/src/nxt_atomic.h @@ -58,6 +58,10 @@ typedef volatile nxt_atomic_uint_t nxt_atomic_t; #define nxt_cpu_pause() \ __asm__ ("pause") +#elif (__aarch64__ || __arm64__) +#define nxt_cpu_pause() \ + __asm__ ("isb") + #else #define nxt_cpu_pause() #endif |