From cfed068c1d81d0ad0fe58885a0120529aa49630a Mon Sep 17 00:00:00 2001 From: Max Romanov Date: Fri, 21 Apr 2017 16:55:13 +0300 Subject: Macros for atomic 'OR' and 'AND' operations introduced. Compiler built-ins used, where possible. Necessary configure checks added. New macros: nxt_atomic_or_fetch(ptr, val) nxt_atomic_and_fetch(ptr, val) Syntax and behaviour is similar to __sync_or_and_fetch and __sync_and_and_fetch GCC build-ins. --- src/nxt_atomic.h | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) (limited to 'src/nxt_atomic.h') diff --git a/src/nxt_atomic.h b/src/nxt_atomic.h index b3a1e95a..9e2e5ec1 100644 --- a/src/nxt_atomic.h +++ b/src/nxt_atomic.h @@ -51,6 +51,14 @@ nxt_atomic_release(lock) \ __sync_lock_release(lock) +#define nxt_atomic_or_fetch(ptr, val) \ + __sync_or_and_fetch(ptr, val) + + +#define nxt_atomic_and_fetch(ptr, val) \ + __sync_and_and_fetch(ptr, val) + + #if (__i386__ || __i386 || __amd64__ || __amd64) #define \ nxt_cpu_pause() \ @@ -85,6 +93,15 @@ nxt_atomic_xchg(lock, set) \ nxt_atomic_fetch_add(value, add) \ (atomic_add_long_nv(value, add) - add) + +#define nxt_atomic_or_fetch(ptr, val) \ + atomic_or_ulong_nv(ptr, val) + + +#define nxt_atomic_and_fetch(ptr, val) \ + atomic_and_ulong_nv(ptr, val) + + /* * Solaris uses SPARC Total Store Order model. In this model: * 1) Each atomic load-store instruction behaves as if it were followed by -- cgit