From dfdf948f899bda9120750d28c1be32f255ed941f Mon Sep 17 00:00:00 2001
From: David CARLIER <devnexen@gmail.com>
Date: Thu, 31 Dec 2020 20:49:19 +0000
Subject: Define nxt_cpu_pause for ARM64.

The isb instruction fits for spin loops where it allows to save cpu
power.

Reviewed-by: Andrew Clayton <a.clayton@nginx.com>
Signed-off-by: Andrew Clayton <a.clayton@nginx.com>
---
 src/nxt_atomic.h | 4 ++++
 1 file changed, 4 insertions(+)

(limited to 'src/nxt_atomic.h')

diff --git a/src/nxt_atomic.h b/src/nxt_atomic.h
index cd2e7253..dae999a9 100644
--- a/src/nxt_atomic.h
+++ b/src/nxt_atomic.h
@@ -58,6 +58,10 @@ typedef volatile nxt_atomic_uint_t  nxt_atomic_t;
 #define nxt_cpu_pause()                                                       \
     __asm__ ("pause")
 
+#elif (__aarch64__ || __arm64__)
+#define nxt_cpu_pause()                                                       \
+    __asm__ ("isb")
+
 #else
 #define nxt_cpu_pause()
 #endif
-- 
cgit